The present invention relates to a method for manufacturing a microelectronic structure including a ferroelectric and/or dielectric thin film layer containing lead or bismuth; and, more particularly, to a method for forming the ferroelectric and/or dielectric thin film layer including a self diffusion barrier at a bottom portion thereof on top of an electrode.
Ferroelectric and/or dielectric thin film materials have been increasingly investigated for use in various electronic and electrooptical application. For example, thin films of ferroelectric and/or dielectric materials such as lead zirconate titanate (PZT) have been investigated for use in non-volatile computer memory applications, sensors, capacitors, piezoelectric devices and various communications applications.
The development of ferroelectric and/or dielectric thin-film materials may yield important advances in miniaturization of memory devices, higher capacity memory devices, true memory capacity, increased radiation hardness and very fast switching.
However, formation of the ferroelectric and/or dielectric thin films typically requires elevated temperature processing, which is not always conducive to integration with conventional silicon-wafer processing technologies, due to temperature limitations as to the stability of the underlying silicon wafer and/or structures thereon. For example, in the ferroelectric and/or dielectric materials containing Pb or Bi as a major constituent, Pb or Bi are extremely volatile and extremely reactive with electrodes at elevated temperatures if the electrodes are made of Pt, causing point defects in the form of vacancies to be formed therein and making the ferroelectric and/or dielectric materials non-stoichiometric. The point defects in the ferroelectric and/or dielectric thin film materials are detrimental because they promote severe polarization fatigue therein, making the ferroelectric and/or dielectric thin film material unsuitable for, e.g., computer memory applications.
Recently, interest has been exhibited in the layered perovskite phase of Srbi2Ta2O9(SBT) for non-volatile ferroelectric memories, due to its ferroelectric properties such as polarization switching, low switching voltage, sufficiently large polarization and minimal tendency to imprint.
One important technique which has successfully produced SBT thin films is the metalloragnic decomposition (MOD) process wherein MOD precursor solutions of large soap-like derivatives (e.g. neo-decanonate carboxylic acid) of the starting metals, are utilized as both the ligand and the solvent. A notable advantage of the MOD strategy is that the chemical precursors, once formed and isolated, demonstrate minimal aging effects.
However, formation of the xe2x80x9csoapxe2x80x9d derivatives involves long reaction times at reflux temperatures and the extent of ligand exchange and in-situ generated reactive species can not be identified, which inhibits optimization of the precursor solution.
Also, the chemical stability of the MOD-formed precursors has a shortcoming that such stability limits the ability to xe2x80x9ctailorxe2x80x9d the properties of the low-reactivity starting compounds through reactions such as chelation, hydrolysis and condensation, thus restricting process flexibility and the ability to control the structural evolution of the thin film microstructures and heat treatment conditions.
Furthermore, high temperatures (800xc2x0 C.) are required to convert the as-deposited MOD precursors to the desired layered perovskite phase. At such elevated temperatures, the electrode stack of a typical device for the ferroelectric materials exhibits severe instability and sublayer interaction problems, caused by Bi diffusing into the electrodes, this phenomena becoming more pronounced when the electrodes are made of platinum. A lot of different ideas have been proposed to solve this problem but to no avail.
It is, therefore, a primary object of the present invention to provide a method for manufacturing a microelectronic structure for use in non-volatile computer memory applications, sensors, capacitors and various communications applications, the microelectronic structure including a stoichiometric ferroelectric and/or dielectric layer containing Pb or Bi formed on top of an electrode.
In accordance with one aspect of the present invention, there is provided a method for manufacturing a microelectronic structure including a stoichiometric ferroelectric and/or dielectric thin film layer containing Pb or Bi formed on top of an electrode, the method comprising the steps of: forming a lower electrode; forming a self diffusion barrier on top of the lower electrode; heat-treating the self diffusion barrier at a first temperature; forming a ferroelectric and/or dielectric thin film layer on top of the self diffusion barrier; heat-treating the ferroelectric and/or dielectric thin film layer at a second temperature; and forming an upper electrode to thereby form the microelectronic structure, wherein a nominal chemical composition of the self diffusion barrier is the same as that of the ferroelectric and/or dielectric thin film layer after the heat-treatment of the ferroelectric and/or dielectric thin film layer.